Multi-step metallization etch
US5827437A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 1996 |
| Grant date | Oct 27, 1998 |
| Priority date | — |
| Expiry date | May 17, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32136
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for etching through a selected portion of a metallization layer of a wafer's layer stack in a high density plasma processing chamber includes performing a main etch by etching at least partially through the metallization layer of the layer stack with a main-etch etchant source gas that includes essentially Cl.sub.2 and BCl.sub.3 having a first Cl.sub.2 :BCl.sub.3 flow ratio. Thereafter, an over etch is performed by etching to a layer underlying the metallization layer with an over-etch etchant source gas that includes essentially Cl.sub.2 and BCl.sub.3 having a second Cl.sub.2 :BCl.sub.3 flow ratio that is higher than the first Cl.sub.2 :BCl.sub.3 flow ratio. The method may further include the step of performing a barrier layer etching step for etching a barrier layer of the layer stack prior to performing the over etch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.