Interposer for semiconductor device
US5866948A · kind A · utility
23Cited by
3References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 18, 1996 |
| Grant date | Feb 2, 1999 |
| Priority date | — |
| Expiry date | Jul 18, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1476
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate 1 of a insulating resin material is provided with a semiconductor chip 2 in the center of the substrate 1 and a lot of fine studs are filled in the substrate 1 around the chip 2. A bonding pad 13 and a land 14 are formed on both end planes of each stud 12 by silver plating. The length of the stud 12 is determined so that the plane of the land 14 and the back side plane of the substrate are approximately co-planar, but it may be longer. The substrate 1 including the studs 12 having the bonding pad 12 and the land 14 is defined as an interposer 15.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.