Method of making a power switching trench MOSFET having aligned source regions

US5897343A · kind A · utility

Assignee

• Motorola, Inc. · US

Inventors

• Leo Mathew · Austin, US
• Keith Kamekona · Scottsdale, US
• Huy Trong Tran · Gilbert, US
• Prasad Venkatraman · Gilbert, US
• Jeffrey Pearse · Chandler, US
• Bich-Yen Nguyen · Austin, US

Key dates

• Filing date: Mar 30, 1998
• Grant date: Apr 27, 1999
• Expiry date: Mar 30, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/127

Abstract

A trench power switching transistor (10) is fabricated having sub-micron features on a body layer (26) without using sub-micron lithography. An opening in a field oxide layer (28) defines an area for implanting a source region (30) in the body layer (26) that is self-aligned to a first edge (28A) and a second edge (28B) of the field oxide layer (28). Sidewall spacers (32) are formed in accordance with the first and second edges (28A and 28B) of the field oxide layer (28). A trench is aligned to the sidewall spacers (32) and formed centered within the source region (30). An implant layer (42) formed between sections of the power switching transistor (10) is aligned to the sidewall spacers (32) at the first and second edges (28A and 28B).