Semiconductor integrated circuit device, and process and apparatus for manufacturing the same
US5910010A · kind A · utility
Assignees
Inventors
- Hirotaka Nishizawa
- Tomoyoshi Miura
- Ichirou Anjou
- Masamichi Ishihara
- Masahiro Yamamura
- Sadao Morita
- Takashi Araki
- Kiyoshi Inoue
- Toshio Sugano
- Tetsuji Kohara
- Toshio Yamada
- Yasushi Sekine
- Yoshiaki Anata
- Masakatsu Goto
- Norihiko Kasai
- Shinobu Takeura
- Mutsuo Tsukuda
- Yasunori Yamaguchi
- Jiro Sawada
- Hidetoshi Iwai
- Seiichiro Tsukui
- Tadao Kaji
- Noboru Shiozawa
Key dates
| Filing date | Feb 18, 1997 |
| Grant date | Jun 8, 1999 |
| Priority date | — |
| Expiry date | Feb 18, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor integrated circuit device includes the steps of constructing a plurality of lead frames having leads which each include an inner portion and an outer portion and electrically connecting a semiconductor chip to the inner portions of the leads of each frame. The lead frames are then stacked one above each other to form a vertical stack and plates are then inserted between each of the lead frames with each plate having an opening in the center whereby a central cavity is formed in the stack. The stack is then placed between a top mold member and a bottom mold member and a resin is injected into the central cavity whereupon the resin is cured to form a single resin package encapsulating the semiconductor chips. The resin package is then released from the mold members.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.