Self-aligned silicidation technique to independently form silicides of different thickness on a semiconductor device
US5953612A · kind A · utility
34Cited by
17References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 30, 1997 |
| Grant date | Sep 14, 1999 |
| Priority date | — |
| Expiry date | Jun 30, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A technique for self-aligned silicidation of semiconductor devices is disclosed. This technique includes the formation of polysilicon device features extending from a semiconductor substrate. A coating is deposited on the features and substrate. Chemical mechanical polishing is performed to remove a portion of the coating to expose a polysilicon surface of the features. A metallic layer is formed to contact the exposed polysilicon surface of each of the features. A silicide layer is formed for each feature from the polysilicon and the metallic layer in contact therewith.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.