Milind Weling
55Patents
18h-index
30Co-inventors
84Inventor score
Filing activity: Jun 5, 1992 → Feb 10, 2015
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5420796A | Method of inspecting planarity of wafer surface after etchback step in integrated circuit fabrication | Emerging Cross-Sectional Technologies | 105 | Expired |
| US6193860A | Method and apparatus for improved copper plating uniformity on a semiconductor wafer using optimized electrical currents | Chemistry; Metallurgy | 58 | Expired |
| US5639697A | Dummy underlayers for improvement in removal rate consistency during chemical mechanical polishing | Emerging Cross-Sectional Technologies | 56 | Expired |
| US6214734A | Method of using films having optimized optical properties for chemical mechanical polishing endpoint detection | Emerging Cross-Sectional Technologies | 47 | Expired |
| US5861342A | Optimized structures for dummy fill mask design | Emerging Cross-Sectional Technologies | 46 | Expired |
| US6569757B1 | Methods for forming co-axial interconnect lines in a CMOS process for high speed applications | Emerging Cross-Sectional Technologies | 45 | Expired |
| US5757502A | Method and a system for film thickness sample assisted surface profilometry | Emerging Cross-Sectional Technologies | 39 | Expired |
| US6545338B1 | Methods for implementing co-axial interconnect lines in a CMOS process for high speed RF and microwave applications | Electricity | 34 | Expired |
| US6139428A | Conditioning ring for use in a chemical mechanical polishing machine | Performing Operations; Transporting | 34 | Expired |
| US5953612A | Self-aligned silicidation technique to independently form silicides of different thickness on a semiconductor device | Electricity | 34 | Expired |
| US5399533A | Method improving integrated circuit planarization during etchback | Electricity | 30 | Expired |
| US6319796A | Manufacture of an integrated circuit isolation structure | Emerging Cross-Sectional Technologies | 30 | Expired |
| US5378318A | Planarization | Electricity | 29 | Expired |
| US6387720B1 | Waveguide structures integrated with standard CMOS circuitry and methods for making the same | Physics | 28 | Expired |
| US5540958A | Method of making microscope probe tips | Physics | 25 | Expired |
| US7856613B1 | Method for self-aligned doubled patterning lithography | Physics | 25 | Active |
| US5653622A | Chemical mechanical polishing system and method for optimization and control of film removal uniformity | Performing Operations; Transporting | 23 | Expired |
| US5618757A | Method for improving the manufacturability of the spin-on glass etchback process | Emerging Cross-Sectional Technologies | 19 | Expired |
| US5965941A | Use of dummy underlayers for improvement in removal rate consistency during chemical mechanical polishing | Emerging Cross-Sectional Technologies | 14 | Expired |
| US5952241A | Method and apparatus for improving alignment for metal masking in conjuction with oxide and tungsten CMP | Electricity | 13 | Expired |
| US5522957A | Method for leak detection in etching chambers | Emerging Cross-Sectional Technologies | 13 | Expired |
| US6028013A | Moisture repellant integrated circuit dielectric material combination | Electricity | 11 | Expired |
| US5496774A | Method improving integrated circuit planarization during etchback | Electricity | 10 | Expired |
| US5783488A | Optimized underlayer structures for maintaining chemical mechanical polishing removal rates | Electricity | 10 | Expired |
| US6315645A | Patterned polishing pad for use in chemical mechanical polishing of semiconductor wafers | Performing Operations; Transporting | 10 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.