Controlled linewidth reduction during gate pattern formation using a spin-on barc
US5965461A · kind A · utility
33Cited by
8References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 1, 1997 |
| Grant date | Oct 12, 1999 |
| Priority date | — |
| Expiry date | Aug 1, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/952
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A gate is formed by depositing a gate conductive layer over a substrate layer, depositing an organic spin-on bottom anti-reflective coating (BARC) over the gate conductive layer, and forming a resist mask on the BARC. Next, the resist mask is controllably etched to further reduce the critical dimensions of gate pattern formed therein, and then the gate is formed by etching the gate conductive layer using the reduced size resist mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.