Method to manufacture dual damascene using a phantom implant mask
US5985753A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 1998 |
| Grant date | Nov 16, 1999 |
| Priority date | — |
| Expiry date | Aug 19, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1026
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of manufacturing semiconductor devices wherein a selected layer is implanted with heavy ions in a pattern having dimensions of a via structure to be formed in a first layer of interlayer dielectric. In a first embodiment, the ions are implanted in an etch stop layer formed between a first and second layer of interlayer dielectric. In a second embodiment, the ions are implanted in the second layer of interlayer dielectric. Selective etch processes form a trench structure in the second layer of interlayer dielectric and form a via structure in the first layer of interlayer dielectric. The via structure and trench structure are filled with a conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.