Method of making a low power SRAM
US6008080A · kind A · utility
21Cited by
9References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 21, 1997 |
| Grant date | Dec 28, 1999 |
| Priority date | — |
| Expiry date | Nov 21, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/811
Abstract
An SRAM is formed having the six transistor cell. The pull down transistors are formed so that no arsenic is implanted into the drains of the pull down transistors so that the drains of the pull down transistors are doped only by phosphorus implantation. The sources of the pull down transistors are doped with an LDD configuration of phosphorus ions and then a further implantation of arsenic ions is performed. This can conveniently be accomplished by providing an opening in the mask used to implant impurities into the source/drain regions of the ESD protection circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.