Direct connect interconnect for testing semiconductor dice and wafers
US6025730A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 1997 |
| Grant date | Feb 15, 2000 |
| Priority date | — |
| Expiry date | Mar 17, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R1/0408
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An interconnect and system for testing semiconductor dice, and a test method using the interconnect are provided. The interconnect includes a substrate having patterns of contact members for electrically contacting the dice. The interconnect also includes patterns of conductors for providing electrical paths to the contact members. In addition, the interconnect includes contact receiving cavities configured to retain electrical connectors of a testing apparatus in electrical communication with the conductors. A die level test system includes the interconnect mounted to a temporary package for a singulated die. In the die level test system, the interconnect provides direct electrical access from testing circuitry to the die. A wafer level test system includes the interconnect mounted to a probe card fixture of a wafer probe handler. In the wafer level test system, the contact receiving cavities can be configured to support and align the interconnect to the probe card fixture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.