Method of forming a nano-rugged silicon-containing layer

US6040230A · kind A · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• John Mark Anthony · McKinney, US
• Robert M. Wallace · Richardson, US
• Yi Wei · Saratoga, US
• Glen Wilk · Scottsdale, US

Key dates

• Filing date: Mar 13, 1998
• Grant date: Mar 21, 2000
• Expiry date: Mar 13, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/711

Abstract

An embodiment of the instant invention is a method of forming a nano-rugged silicon-containing layer, the method comprising the steps of: providing a first silicon-containing layer (steps 202 or 802); providing a patterning layer over the first silicon-containing layer (steps 204 or 804); the patterning layer comprised of an amorphous substance; providing a second silicon-containing layer (steps 206 or 808) over the patterning layer; and wherein the patterning layer creates a nano-rugged texture in the second silicon-containing layer. Preferably, the first and second silicon-containing layers are comprised of polycrystalline silicon. In an alternative embodiment, the patterning layer is comprised of a material which has small holes such that the step of providing the second silicon-containing layer utilizes the first silicon-containing layer as a seed layer through the small holes so as to form the second silicon-containing layer. In another alternative embodiment, the second silicon-containing layer is comprised of a plurality of islands of the silicon-containing material separated by voids in the material. Preferably, the patterning layer is comprised of SiO.sub.2.