Yi Wei
21Patents
11h-index
27Co-inventors
71Inventor score
Filing activity: Aug 20, 1991 → Jul 29, 2004
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6765619B1 | Method and apparatus for optimizing exposure time in image acquisitions | Electricity | 61 | Expired |
| US5208719A | Output pad electrostatic discharge protection circuit for MOS devices | Electricity | 43 | Expired |
| US5496751A | Method of forming an ESD and hot carrier resistant integrated circuit structure | Electricity | 36 | Expired |
| US5342794A | Method for forming laterally graded deposit-type emitter for bipolar transistor | Emerging Cross-Sectional Technologies | 33 | Expired |
| US6258637A | Method for thin film deposition on single-crystal semiconductor substrates | Emerging Cross-Sectional Technologies | 31 | Expired |
| US5631485A | ESD and hot carrier resistant integrated circuit structure | Electricity | 29 | Expired |
| US6545258B2 | Photo-sensor cross-section for increased quantum efficiency | Electricity | 25 | Expired |
| US6020247A | Method for thin film deposition on single-crystal semiconductor substrates | Emerging Cross-Sectional Technologies | 16 | Expired |
| US5504364A | CMOS locos isolation for self-aligned NPN BJT in a BiCMOS process | Electricity | 16 | Expired |
| US5391502A | Per-wafer method for globally stressing gate oxide during device fabrication | Electricity | 14 | Expired |
| US6277681A | Process to produce ultrathin crystalline silicon nitride on Si(111) for advanced gate dielectrics | Electricity | 11 | Expired |
| US6031258A | High DC current stagger power/ground pad | Electricity | 7 | Expired |
| US7132372B2 | Method for preparing a semiconductor substrate surface for semiconductor device fabrication | Emerging Cross-Sectional Technologies | 7 | Expired |
| US5830532A | Method to produce ultrathin porous silicon-oxide layer | Electricity | 6 | Expired |
| US5659197A | Hot-carrier shield formation for bipolar transistor | Electricity | 5 | Expired |
| US6040230A | Method of forming a nano-rugged silicon-containing layer | Electricity | 4 | Expired |
| US7169619B2 | Method for fabricating semiconductor structures on vicinal substrates using a low temperature, low pressure, alkaline earth metal-rich process | Electricity | 3 | Expired |
| US6420729B1 | Process to produce ultrathin crystalline silicon nitride on Si (111) for advanced gate dielectrics | Electricity | 2 | Expired |
| US6274510A | Lower temperature method for forming high quality silicon-nitrogen dielectrics | Electricity | 2 | Expired |
| US6613698B2 | Lower temperature method for forming high quality silicon-nitrogen dielectrics | Electricity | 1 | Expired |
| US6730977B2 | Lower temperature method for forming high quality silicon-nitrogen dielectrics | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.