C-V method to extract lateral channel doping profiles of MOSFETs
US6069485A · kind A · utility
13Cited by
1References
16Claims
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Key dates
| Filing date | Jan 26, 1999 |
| Grant date | May 30, 2000 |
| Priority date | — |
| Expiry date | Jan 26, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/14
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and apparatus that uses gate-to-substrate capacitance with varying amounts of source/drain junction bias to measure channel lateral doping profile by applying a series of different voltages between the source/drain and the substrate. The gate capacitance is measured for the different voltages. The capacitance is used to calculate the depletion width. From the depletion width, channel doping is calculated. Using this method direct evidence of a localized Boron pile up at source/drain edge is shown.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.