Method for manufacturing DRAM capacitor
US6080619A · kind A · utility
2Cited by
1References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 27, 1998 |
| Grant date | Jun 27, 2000 |
| Priority date | — |
| Expiry date | May 27, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
Abstract
A method for manufacturing a DRAM capacitor is provided to form a lower electrode with a cylindrical profile by using a first stage and a second stage. The stages provide different etching rates in various situations. The invention uses the stages to allow the part of the second polysilicon layer between the capacitors to be completely etched and prevent the other part of the second polysilicon layer serving as a lower electrode from over-etching. The invention provides an easier process of forming a cylindrical capacitor with a larger surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.