HSQ with high plasma etching resistance surface for borderless vias
US6087724A · kind A · utility
14Cited by
4References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 27, 1998 |
| Grant date | Jul 11, 2000 |
| Priority date | — |
| Expiry date | May 27, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31058
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
HSQ is employed for gap filling patterned metal layers. The surface of the deposited HSQ gap fill layer is modified to decrease its plasma etching rate. Embodiments include modifying the HSQ surface by exposure to a plasma, such as a nitrogen-containing plasma, e.g., a plasma containing ammonia or hydrogen/nitrogen, to form a nitrided surface region. Reduction of the plasma etching rate of HSQ enables formation of reliable low resistance borderless vias.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.