Inventor · Austin, TX, US

Robert Dawson

135Patents
30h-index
33Co-inventors
90Inventor score

Filing activity: Jan 18, 1982 → Oct 2, 2013

Most-cited inventions

PatentTitleAreaCited byStatus
US6111260A Method and apparatus for in situ anneal during ion implant Electricity 279 Expired
US5850105A Substantially planar semiconductor topography using dielectrics and chemical mechanical polish Electricity 261 Expired
US5953626A Dissolvable dielectric method Electricity 110 Expired
US5516729A Method for planarizing a semiconductor topography using a spin-on glass material with a variable chemical-mechanical polish rate Emerging Cross-Sectional Technologies 106 Expired
US5918129A Method of channel doping using diffusion from implanted polysilicon Electricity 105 Expired
US6060345A Method of making NMOS and PMOS devices with reduced masking steps Electricity 104 Expired
US5759913A Method of formation of an air gap within a semiconductor dielectric by solvent desorption Electricity 99 Expired
US5827776A Method of making an integrated circuit which uses an etch stop for producing staggered interconnect lines Electricity 79 Expired
US5885877A Composite gate electrode incorporating dopant diffusion-retarding barrier layer adjacent to underlying gate dielectric Electricity 69 Expired
US5930642A Transistor with buried insulative layer beneath the channel region Electricity 68 Expired
US5899732A Method of implanting silicon through a polysilicon gate for punchthrough control of a semiconductor device Electricity 67 Expired
US5792706A Interlevel dielectric with air gaps to reduce permitivity Electricity 63 Expired
US5963803A Method of making N-channel and P-channel IGFETs with different gate thicknesses and spacer widths Electricity 61 Expired
US5710054A Method of forming a shallow junction by diffusion from a silicon-based spacer Electricity 59 Expired
US5783864A Multilevel interconnect structure of an integrated circuit having air gaps and pillars separating levels of interconnect Electricity 55 Expired
US6137182A Method of reducing via and contact dimensions beyond photolithography equipment limits Electricity 55 Expired
US6225151A Nitrogen liner beneath transistor source/drain regions to retard dopant diffusion Electricity 51 Expired
USD304424S Tamper proof container closure General 47 Expired
US5503882A Method for planarizing an integrated circuit topography Electricity 46 Expired
US5899727A Method of making a semiconductor isolation region bounded by a trench and covered with an oxide to improve planarization Electricity 45 Expired
US5963783A In-line detection and assessment of net charge in PECVD silicon dioxide (oxide) layers Electricity 44 Expired
US5888675A Reticle that compensates for radiation-induced lens error in a photolithographic system Physics 43 Expired
US6259142A Multiple split gate semiconductor device and fabrication method Electricity 41 Expired
US5840451A Individually controllable radiation sources for providing an image pattern in a photolithographic system Emerging Cross-Sectional Technologies 39 Expired
US5814555A Interlevel dielectric with air gaps to lessen capacitive coupling Electricity 38 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.