Method of making a dual damascene interconnect structure using low dielectric constant material for an inter-level dielectric layer
US6100184A · kind A · utility
148Cited by
6References
12Claims
0Family size
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Key dates
| Filing date | Aug 20, 1997 |
| Grant date | Aug 8, 2000 |
| Priority date | — |
| Expiry date | Aug 20, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/902
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A technique for fabricating a dual damascene interconnect structure using a low dielectric constant material as a dielectric layer or layers. A low dielectric constant (low-.di-elect cons.) dielectric material is used to form an inter-level dielectric (ILD) layer between metallization layers and in which via and trench openings are formed in the low-.di-elect cons. ILD. The dual damascene technique allows for both the via and trench openings to be filled at the same time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.