Conductive epoxy flip-chip package and method
US6134118A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 3, 1997 |
| Grant date | Oct 17, 2000 |
| Priority date | — |
| Expiry date | Apr 3, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49171
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for producing a multichip package comprising semiconductor chip and a substrate. The semiconductor chip includes conventional inner bond pads that are rerouted to other areas on the chip to facilitate connection with the substrate. The inner bonds are rerouted by covering the chip with a first insulation layer and opening the first insulation layer over the inner bond pads. A metal layer is then disposed over the first insulation layer in contact with the inner bond pads. A second insulation layer is disposed over the metal layer, and the second insulation layer is opened to expose selected portions of the metal layer to form external connection points. Electrically conductive epoxy is then disposed between the external connection points of the semiconductor chip and the terminals of the substrate, thereby electrically connecting the semiconductor chip to the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.