Metal line deposition process
US6136709A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Oct 6, 1999 |
| Grant date | Oct 24, 2000 |
| Priority date | — |
| Expiry date | Oct 6, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76877
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for depositing metal lines for semiconductor devices, in accordance with the present invention includes the steps of providing a semiconductor wafer including a dielectric layer formed on the wafer, the dielectric layer having vias formed therein and placing the wafer in a deposition chamber. The method further includes depositing a metal on the wafer to fill the vias wherein the metal depositing is initiated when the wafer is at a first temperature and the depositing is continued while heating the wafer to a target temperature which is greater than the first temperature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.