Patent · US Expired

Ferroelectric memory configuration

US6137712A · kind A · utility

5Cited by

4References

5Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Thomas Rohr · Aschheim, DE
Heinz Honigschmid · Starnberg, DE
Georg Braun · Hersbruck, DE

Key dates

Filing date	Nov 15, 1999
Grant date	Oct 24, 2000
Priority date	—
Expiry date	Nov 15, 2019

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/22
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The invention relates to a memory configuration comprising a multiplicity of memory cells. Each of the memory cells has at least one ferroelectric storage capacitor and a selection transistor. The memory cells are addressed via word lines and bit line pairs. It is possible for a reference signal obtained from a reference cell pair via a bit line pair to be compared with a read signal from a memory cell in a sense amplifier. The sense amplifier is thereby assigned two bit line pairs connected in such a way that the reference signal is applied via the first bit line pair and, at the same time, the read signal is applied via the second bit line pair to the sense amplifier.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.