Semiconductor body with metallizing on the back side

US6147403A · kind A · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Martin Matschitsch · Fürstenfeld, AT
• Thomas Laska · Birkenfeld, DE
• Herbert Mascher · Kötschach, AT
• Andreas Matzler · Velden am Wörther See, AT
• Werner Stefaner · Villach, AT
• Gernot Moik · Sattendorf, AT

Key dates

• Filing date: Apr 8, 1999
• Grant date: Nov 14, 2000
• Expiry date: Apr 8, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/1306
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

To markedly reduce wafer warping of semiconductor wafers without weakening the strength of adhesion to substrate materials, a novel back side metallizing system is presented. On a silicon semiconductor body an aluminum layer and a diffusion barrier layer that includes titanium are provided. A titanium nitride layer is incorporated into the titanium layer because it has been demonstrated that the titanium nitride layer can compensate for a large proportion of the wafer warping that occurs. Preferably, the usual tempering for improving the ohmic contact between the aluminum layer and the silicon semiconductor body is not performed after the complete metallizing of the semiconductor body, but rather after a first, thin aluminum layer has been deposited onto the silicon semiconductor body.