Shallow junction formation by out-diffusion from a doped dielectric layer through a salicide layer
US6150243A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 1998 |
| Grant date | Nov 21, 2000 |
| Priority date | — |
| Expiry date | Nov 5, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0227
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Self-aligned, ultra-shallow, heavily-doped source and drain regions of a MOS device are formed by implanting dopant containing ions in a dielectric layer formed on metal silicide layer portions on regions of a silicon-containing substrate where source and drain regions are to be formed in a silicon-containing substrate. Thermal treatment of the implanted dielectric layer results in out-diffusion of dopant through the metal silicide layer and into the region of the silicon-containing substrate immediately below the metal silicide layer portions, thereby forming heavily doped source and drain regions having an ultra-shallow junction spaced apart from the metal silicide/silicon substrate interface by a substantially uniform distance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.