Method of fabricating a magnetic random access memory
US6153443A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 1998 |
| Grant date | Nov 28, 2000 |
| Priority date | — |
| Expiry date | Dec 21, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
An improved and novel fabrication method for magnetoresistive random access memory (MRAM) is provided. An MRAM device has memory elements and circuitry for managing the memory elements. The circuitry includes transistor (12a), digit line (29), etc., which are integrated on a substrate (11). The circuitry is fabricated first under the CMOS process and then magnetic memory elements (53, 54). A dielectric layer (40, 41) is deposited on the circuit, and trenches (42, 43) are formed in the dielectric layer. A blanket layer (46), which includes magnetic layers (48, 49) and a non-magnetic layer (50) sandwiched by the magnetic layers, is deposited on dielectric layer (41) and in the trenches. Then, the blanket layer outside the trenches is removed and MRAM elements (53, 54) are formed in the trenches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.