Adjustable level shifter circuits for analog or multilevel memories
US6184726A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 1999 |
| Grant date | Feb 6, 2001 |
| Priority date | — |
| Expiry date | Jun 29, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Level shifter circuits are used to configure analog or multilevel memory cells. A level shifter circuit generates an output voltage that is above the input voltage by an offset voltage value. The magnitude of this offset voltage or the relationship between the input and output voltages of the level shifter is adjustable or programmably selectable. Adjustments can be made after the integrated circuits is fabricated and packaged. Adjustments are made by configuring bits of data in the integrated circuit to indicate the offset voltage or other parameters. These configuration bits are implemented using latches, flip-flops, registers, memory cells, or other storage circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.