MRAM device including digital sense amplifiers
US6188615A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 1999 |
| Grant date | Feb 13, 2001 |
| Priority date | — |
| Expiry date | Oct 29, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/1693
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Resistance of a selected memory cell in a Magnetic Random Access Memory ("MRAM") device is sensed by a read circuit including a direct injection charge amplifier, an integrator capacitor and a digital sense amplifier. The direct injection charge amplifier supplies current to the integrator capacitor while maintaining an equipotential voltage on non-selected memory cells in the MRAM device. As the direct injection charge amplifier applies a fixed voltage to the selected memory cell, the sense amplifier measures integration time of a signal on the integrator. The signal integration time indicates whether the memory cell MRAM resistance is at a first state (R) or a second state (R+.DELTA.R).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.