Fabrication of trench capacitors using disposable hard mask

US6190955A · kind A · utility

Assignees

• International Business Machines Corporation · US
• Infineon Technologies North America Corp. · US
• Kabushiki Kaisha Toshiba · JP

Inventors

• Matthias Ilg · Fishkill, US
• Richard L. Kleinhenz · Wappingers Falls, US
• Soichi Nadahara · Yokohama, JP
• Ronald W. Nunes · Hopewell Junction, US
• Klaus Penner · Radeberg, DE
• Klaus Roithner · Aßling, DE
• Radhika Srinivasan · Mahwah, US
• Shigeki Sugimoto · Tokyo, JP

Key dates

• Filing date: Jan 27, 1998
• Grant date: Feb 20, 2001
• Expiry date: Jan 27, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/3081
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Improved trench forming methods for semiconductor substrates using BSG avoid the problems associated with conventional TEOS hard mask techniques. The methods comprise: PA1 (a) providing a semiconductor substrate, PA1 (b) applying a conformal layer of borosilicate glass (BSG) on the substrate; PA1 (c) forming a patterned photoresist layer over the BSG layer whereby a portion of a layer underlying the photoresist layer is exposed, PA1 (d) anisotropically etching through the exposed portion of the underlying layer, through any other layers lying between the photoresist layer and the semiconductor substrate, and into the semiconductor substrate, thereby forming a trench in the semiconductor substrate. Preferably, one or more dielectric layers are present on the substrate surface prior to application of the BSG layer. One or more chemical barrier and/or organic antireflective coating layers may be applied over the BSG layer between the BSG layer and the photoresist layer. The methods are especially useful for forming deep trenches in silicon substrates with pad dielectric layers.