Capacitors, methods of forming capacitors, and DRAM memory cells
US6191443A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 1998 |
| Grant date | Feb 20, 2001 |
| Priority date | — |
| Expiry date | Feb 28, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02263
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Capacitors and methods of forming capacitors are disclosed. In one implementation, a capacitor comprises a capacitor dielectric layer comprising Ta.sub.2 O.sub.5 formed over a first capacitor electrode. A second capacitor electrode is formed over the Ta.sub.2 O.sub.5 capacitor dielectric layer. Preferably, at least a portion of the second capacitor electrode is formed over and in contact with the Ta.sub.2 O.sub.5 in an oxygen containing environment at a temperature of at least about 175.degree. C. Chemical vapor deposition is one example forming method. The preferred second capacitor electrode comprises a conductive metal oxide. A more preferred second capacitor electrode comprises a conductive silicon comprising layer, over a conductive titanium comprising layer, over a conductive metal oxide layer. A preferred first capacitor electrode comprises a conductively doped Si-Ge alloy. Preferably, a Si.sub.3 N.sub.4 layer is formed over the first capacitor electrode. DRAM cells and methods of forming DRAM cells are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.