Method for dual sidewall oxidation in high density, high performance DRAMS

US6197632A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Gary B. Bronner · Stormville, US
• Rama Divakaruni · Ossining, US
• Scott D. Halle · Slingerlands, US
• Dale W. Martin · Hyde Park, US
• Rajesh Rengarajan · Fishkill, US
• Mary E. Weybright · Pleasant Valley, US

Key dates

• Filing date: Nov 16, 1999
• Grant date: Mar 6, 2001
• Expiry date: Nov 16, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/05

Abstract

This invention relates to integrated circuit product and processes. More particularly, the invention relates to high performance Dynamic Random Access Memory (DRAM) chips and processes for making such chips. An IC fabrication is provided, according to an aspect of the invention, including a silicon wafer, a DRAM array fabrication disposed on said silicon wafer having a first multitude of gate sidewall oxides, and a logic support device fabrication disposed on said wafer adjacent said DRAM array fabrication and having a second multitude of gate sidewall oxides, said first multitude of gate sidewall oxides being substantially thicker than said second multitude of gate sidewall oxides. Methods of making IC fabrications according to the invention are also provided.