Inventor · Pleasant Valley, NY, US

Mary E. Weybright

21Patents
10h-index
31Co-inventors
75Inventor score

Filing activity: Aug 6, 1998 → Oct 8, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US6190979A Method for fabricating dual workfunction devices on a semiconductor substrate using counter-doping and gapfill Electricity 154 Expired
US6388294B1 Integrated circuit using damascene gate structure Electricity 50 Expired
US6194301A Method of fabricating an integrated circuit of logic and memory using damascene gate structure Electricity 42 Expired
US9564446B1 SRAM design to facilitate single fin cut in double sidewall image transfer process Electricity 25 Active
US6504210B1 Fully encapsulated damascene gates for Gigabit DRAMs Electricity 24 Expired
US6403423B1 Modified gate processing for optimized definition of array and logic devices on same chip Electricity 21 Expired
US6548357B2 Modified gate processing for optimized definition of array and logic devices on same chip Electricity 19 Expired
US6458646B1 Asymmetric gates for high density DRAM Electricity 16 Expired
US6261972A Dual gate oxide process for uniform oxide thickness Emerging Cross-Sectional Technologies 16 Expired
US6180975A Depletion strap semiconductor memory device Electricity 12 Expired
US6930004B2 Self-aligned drain/channel junction in vertical pass transistor DRAM cell design for device scaling Electricity 9 Expired
US6326260A Gate prespacers for high density, high performance DRAMs Electricity 8 Expired
US6346734B2 Modified gate conductor processing for poly length control in high density DRAMS Emerging Cross-Sectional Technologies 8 Expired
US6197632A Method for dual sidewall oxidation in high density, high performance DRAMS Electricity 7 Expired
US6724053B1 PMOSFET device with localized nitrogen sidewall implantation Electricity 6 Expired
US6096664A Method of manufacturing semiconductor structures including a pair of MOSFETs Electricity 3 Expired
US6380027B2 Dual tox trench dram structures and process using V-groove Electricity 2 Expired
US6670667B2 Asymmetric gates for high density DRAM Electricity 0 Expired
USRE49794E1 SRAM design to facilitate single fin cut in double sidewall image transfer process General 0 Active
US10096521B2 SRAM design to facilitate single fin cut in double sidewall image transfer process Electricity 0 Active
US6656798B2 Gate processing method with reduced gate oxide corner and edge thinning Electricity 0 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.