Low-leakage CoSi2-processing by high temperature thermal processing
US6207563A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 1999 |
| Grant date | Mar 27, 2001 |
| Priority date | — |
| Expiry date | Feb 5, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76843
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of fabricating a silicide layer on a substrate or transistor structures thereon are provided. An exemplary method includes the steps of depositing a layer of metal on a substrate that has a pn junction. The metal layer and the substrate are heated to react the metal with the substrate and form the silicide layer. Any unreacted metal is removed. The substrate and the silicide layer are heated above the agglomeration threshold temperature of any filaments of the silicide layer penetrating the pn junction but below the agglomeration threshold temperature of the silicide layer. The method eliminates silicide filaments, particularly in cobalt silicide processing, that can otherwise penetrate the pn junction of a transistor source/drain region a lead to reverse-bias diode-leakage currents.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.