Process for fabricating a semiconductor device component using a selective silicidation reaction
US6211044A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 1999 |
| Grant date | Apr 3, 2001 |
| Priority date | — |
| Expiry date | Apr 12, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0227
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for fabricating a semiconductor device includes the formation of a hard-mask using lithographic techniques followed by a selective silicidation reaction process to reduce the lateral dimension of the hard-mask. The silicidation reaction is carried out by selectively reacting a reaction layer situated between an etch-stop layer and a reaction resistant layer. Upon completion of the chemical reaction process, the etch-stop layer and the reaction resistant layer is removed, and a residual layer of unreacted material is then used as a mask for the formation of a device component. The lateral dimension of the residual layer can be substantially less than that achievable by optical lithographic techniques.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.