Copper metalization with improved electromigration resistance
US6214731A · kind A · utility
39Cited by
8References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 18, 1999 |
| Grant date | Apr 10, 2001 |
| Priority date | — |
| Expiry date | Nov 18, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Cu interconnection patterns with improved electromigration resistance are formed by depositing a barrier metal layer, such as W or WN, to line an opening in a dielectric layer. The exposed surface of the deposited barrier metal layer is treated with silane or dichlorosaline to form a thin silicon layer thereon. Cu is then deposited to fill the opening and reacted with the thin silicon layer to form a thin layer of Cu silicide at the interface between Cu and the barrier metal layer, thereby reducing the interface defect density and improving electromigration resistance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.