Method of fabricating a self-aligned bipolar junction transistor in silicon carbide and resulting devices

US6218254A · kind A · utility

Assignee

• Cree Research Inc. · US

Inventors

• Ranbir Singh · Cary, US
• Anant Agarwal · San Jose, US
• Sei-Hyung Ryu · Cary, US

Key dates

• Filing date: Sep 22, 1999
• Grant date: Apr 17, 2001
• Expiry date: Sep 22, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/8325

Abstract

A method of fabricating a self-aligned bipolar junction transistor in a semiconductor structure having a first layer of silicon carbide generally having a first conductivity type and a second layer of silicon carbide generally having a second conductivity type, opposite to the first conductivity type. The method comprises forming a pillar in the second silicon carbide layer, the pillar having a side wall and defining an adjacent horizontal surface on the second layer, forming a dielectric layer having a predetermined thickness on the second semiconductor layer, including the side wall and the horizontal surface. After formation of the dielectric layer, the dielectric layer on a portion of the horizontal surface adjacent the side wall is anisotropically etched while at least a portion of the dielectric layer remains on the side wall, thereby exposing a portion of the horizontal surface. A portion of the second layer below the exposed portion of the horizontal surface is then doped with a dopant of the first conductivity type to create a doped well region in the second layer which is spaced from the side wall by a distance defined by the thickness of the dielectric layer. Resulting d…