Combined chemical mechanical polishing and reactive ion etching process

US6221775A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Thomas G. Ference · South Burlington, US
• William Francis Landers · Wappingers Falls, US
• Michael MacDonald · Batavia, US
• Walter E. Mlynko · South Burlington, US
• Mark P. Murray · Burlington, US
• Kirk D. Peterson · Jericho, US

Key dates

• Filing date: Sep 24, 1998
• Grant date: Apr 24, 2001
• Expiry date: Sep 24, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/3212
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A process of planarizing the surface of a semiconductor substrate. The process begins by forming patterned raised and recessed regions on the surface of the semiconductor substrate. A layer of material then is formed over the patterned raised and recessed regions. The layer is subjected to a chemical mechanical planarizing (CMP) process step until all of the raised regions are at least partially removed from the layer. Finally, the surface of the polished substrate is etched with a reactive ion etching (RIE) process.