Method to fabricate a high coupling flash cell with less silicide seam problem

US6232635A · kind A · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Larry Wang · San Jose, US
• Steven C. Avanzino · Cupertino, US
• Jeffrey A. Shields · Sunnyvale, US
• Stephen Keetai Park · Austin, US

Key dates

• Filing date: Apr 6, 2000
• Grant date: May 15, 2001
• Expiry date: Apr 6, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B69/00

Abstract

An article and method of manufacturing a semiconductor flash cell. The method includes producing an isolation formation layer on a silicon substrate, forming an oxide on the isolation formation layer, growing a tunnel oxide layer thereon, depositing a first poly silicon layer, masking and etching the first poly silicon layer, depositing a second poly silicon layer and performing a blanket etch back step, forming an oxide/nitride/oxide layer forming a third poly-silicon layer and depositing a silicide layer thereon.