Vertical electrical cavity-fuse
US6252292A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 1999 |
| Grant date | Jun 26, 2001 |
| Priority date | — |
| Expiry date | Jun 9, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A vertically arranged fuse structure for a semiconductor device. A fuse stud is vertically arranged with respect to a major plane of the semiconductor device and adjacent and electrically connected to overlying electrically conducting material and underlying electrically conducting material. A fuse void is present in the vertically arranged fuse stud. In an unblown state, the fuse provides electrical connection between the overlying electrically conducting material and the underlying electrically conducting material. The electrical connection being breakable by passing electrical energy of a predetermined level through the fuse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.