Patent · US Expired

Synchronous integrated memory

US6259652A · kind A · utility

15Cited by

4References

3Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Patrick Heyne · Hersbruck, DE
Thomas Hein · Hersbruck, DE
Torsten Partsch · San Jose, US
Thilo Marx · Villingen-Schwenningen, DE

Key dates

Filing date	Jul 24, 2000
Grant date	Jul 10, 2001
Priority date	—
Expiry date	Jul 24, 2020

Classification

Technology area (CPC G)Physics
CPC primaryG11C7/1066
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Data items D1, D2 read from memory cells MC are simultaneously buffer-stored in memory stages Si of a FIFO memory MEM and are read out again simultaneously from said FIFO memory at a later point in time. Output units OC1, OC2 serve for outputting, at a data output P, the first data D1 synchronously with positive edges of an external clock signal CLK and the second data D2 synchronously with negative edges of the external clock signal CLK.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.