Low-bandgap source and drain formation for short-channel MOS transistors

US6274894A · kind A · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Karsten Wieczorek · Dresden, DE
• Manfred Horstmann · Dresden, DE
• Frederick N. Hause · Austin, US

Key dates

• Filing date: Aug 17, 1999
• Grant date: Aug 14, 2001
• Expiry date: Aug 17, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/256

Abstract

A transistor having source and drain regions which include lower-bandgap portions and a method for making the same are provided. A gate conductor is formed over a gate dielectric on a semiconductor substrate. The gate conductor is covered on all sides with oxide or another dielectric for protection during subsequent processing. Anisotropic etching is used to form shallow trenches in the substrate on either side of the gate conductor. The trenches are bounded by the dielectric-coated gate conductor and by dielectric isolation regions, or by an adjacent gate conductor in the case of non-isolated transistors. A selective epitaxy technique may then be used to grow a layer within each trench of a material having a bandgap lower than that of the semiconductor substrate. The lower-bandgap material is preferably grown only on the exposed semiconductor surfaces in the trenches, and not on the surrounding dielectric regions. The lower-bandgap material may be an undoped layer used as a buffer for interdiffusion of dopants between the channel and source/drain regions of the transistor. The lower-bandgap material may also be a heavily doped layer with the same carrier type as the semiconductor …