Manufacturing process for semiconductor wafer
US6284658A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 7, 1999 |
| Grant date | Sep 4, 2001 |
| Priority date | — |
| Expiry date | Jul 7, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02008
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention has an object to provide a manufacturing process of a semiconductor wafer in which improvement on accuracy in a chamfering portion is realized. The manufacturing process of a semiconductor wafer comprises: a slicing step of obtaining a wafer in the shaped of a thin disk by slicing a single crystal ingot; a surface-grinding step of flattening a surface of the wafer; a chamfering step of chamfering the peripheral edge portions; and mirror-polishing step of mirror-polishing the surface of the wafer, wherein a simultaneous double-side surface-grinding step of grinding both sides of the wafer simultaneously by a double-side grinding machine is existent prior to the chamfering step in order to remove wafer waviness and a secondary grinding step is performed by grinding a single side or simultaneously both sides of the wafer after the chamfering step is carried out, so that improvement on accuracy in a chamfered portion is realized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.