Barrier accumulation-mode MOSFET
US6285060A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1999 |
| Grant date | Sep 4, 2001 |
| Priority date | — |
| Expiry date | Dec 30, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/661
Abstract
In a trench-gated MOSFET, a lightly doped drift region of the N-type drain lies in the mesa between the trenches. The gate is doped with N-type material so that depletion regions are formed in the drift region when the gate voltage is equal to zero. The depletion regions merge at the center of the mesa, pinching off the flow of current when the device is turned off. This current-pinching effect allows the P-type body region to be made shallower and doped more lightly than usual without creating a punchthrough problem, because the barrier represented by the depletion regions adds to the normal current blocking capability of the PN junction between the body and drain regions. When the device is turned on by biasing the gate to a positive voltage, a low resistance accumulation layer forms in the drift region adjacent the trenches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.