High rate silicon deposition method at low pressures
US6287635A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 1999 |
| Grant date | Sep 11, 2001 |
| Priority date | — |
| Expiry date | Sep 15, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/2001
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A method for high rate silicon deposition at low pressures, including a method of operating a CVD reactor having a high degree of temperature and gas flow uniformity, the method of operation providing a novel combination of wafer temperature, gas flow and chamber pressure. According to the method, a substrate is placed in a vacuum chamber wherein a reactant gas is provided at a high velocity in parallel with the substrate via a plurality of temperature controlled gas injectors providing a condition wherein the deposition rate is only limited by the rate of delivery of unreacted gas to the substrate surface and the rate of removal of reaction byproducts. The novel combination of process conditions moves the reaction at the wafer surface into the regime where the deposition rate exceeds the crystallization rate, resulting in very small crystal growth and therefore a very smooth polysilicon film with a surface roughness on the order of 5-7 nm for films 2500 angstroms thick. The process is configured to operate below what is known as the "transition" temperature, at which level each layer of film is deposited in an amorphous form and then crystallizes as the deposition proceeds because…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.