Electrostatic discharge protection transistor structure with a trench extending through the source or drain silicide layers

US6310380A · kind A · utility

Assignee

• Chartered Semiconductor Manufacturing LTD · SG

Inventors

• Jun Cai · Allen, US
• Keng Foo Lo · Singapore, SG

Key dates

• Filing date: Mar 6, 2000
• Grant date: Oct 30, 2001
• Expiry date: Mar 6, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D89/815

Abstract

A MOS transistor structure is provided for ESD protection in an integrated circuit device. A trench controls salicide deposition to prevent hot spot formation and allows control of the turn-on voltage. The structure includes source and drain diffusion regions formed in the silicon substrate, a gate, and n-wells formed under the source and drain diffusions on either side of the gate. A drain trench is located to separate the salicide between a drain contact and the gate edge, and by controlling the size and location of the drain trench, the turn-on voltages can be controlled; i.e., the turn-on voltage due to drain diffusion region to substrate avalanche breakdown and the turn-on voltage due to source well to drain well punch-through. Thus, very low turn-on voltages may be achieved for ESD protection.