Wire structure of substrate for layout detection
US6313413A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 1999 |
| Grant date | Nov 6, 2001 |
| Priority date | — |
| Expiry date | Oct 8, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/00014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The substrate of the present invention mainly includes a plurality of bonding pads, a plurality of ball pads, a plurality of traces, a plurality of holes, a first wire and a second wire. The bonding pads and ball pads are located on a first surface of the substrate and are connected to one another by the traces. The first wire is arranged at the edge of the first surface of the substrate, the second wire is arranged at a slot area of a second surface of the substrate which is adhesively covered by a solder mask and further has two ends connecting to the first wire. The holes connect the first surface to the second surface. The traces are connected the bonding pads and ball pads of the first surface by passing through the corresponding holes and a slot area to the second wire of the second surface to form closed loops. In the slot area, the solder mask adhesively covers the traces. During the slot sawing processes of the slot area, some parts of the traces in the slot area and the second wire are cut to form an opened loop. Then the ends of the traces at the edge of the slot area have little lateral malleability. Thus the adjacent ends of traces cannot be connected to one another; s…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.