Easy to manufacture integrated semiconductor memory configuration with platinum electrodes

US6316802A · kind A · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Gunther Schindler · Hersbruck, DE
• Walter Hartner · Munich, DE
• Frank Hintermaier · Hersbruck, DE
• Carlos Mazure-Espejo · Zorneding, DE
• Rainer Bruchhaus · Yokohama, JP
• Wolfgang Hönlein · Unterhaching, DE
• Manfred Engelhardt · Feldkirchen-Westerham, DE

Key dates

• Filing date: Mar 30, 1999
• Grant date: Nov 13, 2001
• Expiry date: Mar 30, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B53/00

Abstract

The integrated semiconductor memory configuration has a semiconductor body in which selection transistors and storage capacitors are integrated. The storage capacitors have a dielectric layer configured between two electrodes. At least the upper electrode is constructed in a layered manner with a platinum layer, that is seated on the dielectric layer, and a thicker, base metal layer lying above the platinum layer.