Semiconductor integrated circuit and its manufacturing method
US6326218A · kind A · utility
25Cited by
14References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 22, 2000 |
| Grant date | Dec 4, 2001 |
| Priority date | — |
| Expiry date | May 22, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/682
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Described is a manufacturing method of an integrated circuit which uses a thin film such as platinum or BST as a hard mask upon patterning ruthenium or the like, thereby making it possible to form a device without removing the hard mask. In addition, the invention method makes it possible to interpose a protecting film such as platinum in order to prevent, upon removing a resist used for the patterning of the hard mask, an underlying ruthenium film or the like from being damaged.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.