Alternate method and structure for improved floating gate tunneling devices using textured surface
US6331465A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 15, 2000 |
| Grant date | Dec 18, 2001 |
| Priority date | — |
| Expiry date | Feb 15, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/964
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and structure for textured surfaces in non volatile floating gate tunneling oxide (FLOTOX) devices, e.g. FLOTOX transistors, are provided. The present invention capitalizes on using "self-structured masks" and a controlled etch to form nanometer scale microtip arrays to form the textured surfaces. The present invention further employs atomic layer epitaxy (ALE) to create a very conformal tunnel oxide layer which complements the nanometer scale microtip arrays. The resulting structure provides a higher tunneling current than currently exists in FLOTOX technology. The improved tunneling currents at low voltages can make these FLOTOX devices suitable for replacing DRAMS.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.