Leonard Forbes
1,114Patents
102h-index
30Co-inventors
90Inventor score
Filing activity: Sep 21, 1989 → Sep 30, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7045430B2 | Atomic layer-deposited LaAlO3 films for gate dielectrics | Electricity | 670 | Expired |
| US7135421B2 | Atomic layer-deposited hafnium aluminum oxide | Electricity | 632 | Expired |
| US7235501B2 | Lanthanum hafnium oxide dielectrics | Electricity | 628 | Expired |
| US7192824B2 | Lanthanide oxide / hafnium oxide dielectric layers | Electricity | 605 | Expired |
| US7192892B2 | Atomic layer deposited dielectric layers | Electricity | 598 | Expired |
| US7312494B2 | Lanthanide oxide / hafnium oxide dielectric layers | Electricity | 579 | Expired |
| US7405454B2 | Electronic apparatus with deposited dielectric layers | Electricity | 564 | Expired |
| US7393736B2 | Atomic layer deposition of Zrx Hfy Sn1-x-y O2 films as high k gate dielectrics | Electricity | 558 | Expired |
| US7902582B2 | Tantalum lanthanide oxynitride films | Electricity | 505 | Active |
| US6150687A | Memory cell having a vertical transistor with buried source/drain and dual gates | Electricity | 324 | Expired |
| US6570248B1 | Structure and method for a high-performance electronic packaging assembly | Electricity | 310 | Expired |
| US6545314B2 | Memory using insulator traps | Electricity | 309 | Expired |
| US6141248A | DRAM and SRAM memory cells with repressed memory | Physics | 299 | Expired |
| US6689660B1 | 4 F2 folded bit line DRAM cell structure having buried bit and word lines | Electricity | 280 | Expired |
| US7369435B2 | Write once read only memory employing floating gates | Physics | 269 | Expired |
| US6744094B2 | Floating gate transistor with horizontal gate layers stacked next to vertical body | Physics | 266 | Expired |
| US6514828B2 | Method of fabricating a highly reliable gate oxide | Electricity | 264 | Expired |
| US6072209A | Four F.sup.2 folded bit line DRAM cell structure having buried bit and word lines | Electricity | 256 | Expired |
| US5936274A | High density flash memory | Electricity | 251 | Expired |
| US6143636A | High density flash memory | Electricity | 242 | Expired |
| US5909618A | Method of making memory cell with vertical transistor and buried word and body lines | Electricity | 241 | Expired |
| US5991225A | Programmable memory address decode array with vertical transistors | Electricity | 240 | Expired |
| US6281042A | Structure and method for a high performance electronic packaging assembly | Electricity | 239 | Expired |
| US5973356A | Ultra high density flash memory | Electricity | 230 | Expired |
| US6921702B2 | Atomic layer deposited nanolaminates of HfO2/ZrO2 films as gate dielectrics | Emerging Cross-Sectional Technologies | 229 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.