Cache coherency protocol employing a read operation including a programmable flag to indicate deallocation of an intervened cache line
US6345342B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 1999 |
| Grant date | Feb 5, 2002 |
| Priority date | — |
| Expiry date | Nov 9, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0831
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A novel cache coherency protocol provides a modified-unsolicited (Mu) cache state to indicate that a value held in a cache line has been modified (i.e., is not currently consistent with system memory), but was modified by another processing unit, not by the processing unit associated with the cache that currently contains the value in the Mu state, and that the value is held exclusive of any other horizontally adjacent caches. Because the value is exclusively held, it may be modified in that cache without the necessity of issuing a bus transaction to other horizontal caches in the memory hierarchy. The Mu state may be applied as a result of a snoop response to a read request. The read request can include a flag to indicate that the requesting cache is capable of utilizing the Mu state. Alternatively, a flag may be provided with intervention data to indicate that the requesting cache should utilize the modified-unsolicited state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.