Method and device for array threshold voltage control by trapped charge in trench isolation
US6348394B1 · kind B1 · utility
4Cited by
18References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 18, 2000 |
| Grant date | Feb 19, 2002 |
| Priority date | — |
| Expiry date | May 18, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76224
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device and method of manufacturing thereof are provided. A trench is formed in a semiconductor substrate. A thin oxide liner is preferably formed on surfaces of the trench. A nitride liner is formed in the trench. Charge is trapped in the nitride liner. In a preferred embodiment, the trench is filled with an oxide by an HDP process to increase the amount of charge trapped in the nitride liner. Preferably, the oxide fill is formed directly on the nitride liner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.