Patent · US Expired

Integrated memory having a differential sense amplifier

US6351422B2 · kind B2 · utility

12Cited by
5References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 28, 2001
Grant dateFeb 26, 2002
Priority date
Expiry dateMar 28, 2021

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C7/22
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The memory has writable memory cells. In addition, it has a bit line pair which connects the memory cells MC to a differential sense amplifier. A control unit is used for precharging the bit lines in a plurality of steps before one of the memory cells is conductively connected to one of the bit lines for a read access operation. For a write access operation, the control unit carries out no more than some of the bit line precharging steps provided for a read access operation before the sense amplifier transfers data to the bit line pair.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.